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KingFast Memoria RAM DDR3 DDR 3 4GB 8GB 4 8 GB 1600MHz SODIMM UDIMM Desktop

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Quick Details

Memory Capacity: 4GB/8GB
Place of Origin: Guangdong China
Delivery time: 5-7 Working Days
Warranty: 1 Year
Payment terms: TT Westunion
Feature: High Performance
Certification: FCC,ce,RoHS
Brand Name: KingFast
Function: REG ECC
Type: DDR3
Products Status: Stock
Brand supply: OEM Brand Logo
Frequency: 1600MHz
Compatibility: Fully Compatible
Application: Desktop
Chipsets: Original Chipsets
Certificate: CE RoHS FCC
Selling Units: Multiple of 10
Package size per batch: 15X10X10 cm
Gross weight per batch: 0.5 KG
Package Preview: https://sc04.alicdn.com/kf/Ha8e8c7fe3c7045c8a7cc56553530c1fd5.png_640x640.png
Shenzhen Micro Innovation Industry Co., Ltd.
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US$ 2,400,000+
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• DDR3L functionality and operations supported as defined in the component data sheet
• 240-pin, unbuffered dual in-line memory module (UDIMM)
• VDD = VDDQ = 1.35V (1.283–1.45V)
• Fast data transfer rates: PC3-14900, PC3-12800, or PC3-10600 • 4GB , 8GB
• Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
• Backward-compatible to VDD = VDDQ = 1.5V ± 0.75V • VDDSPD = 3.0–3.6V • Reset pin for improved system stability • Dual-rank
• Adjustable data-output drive strength
• Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS) • Serial presence-detect (SPD) EEPROM • Gold edge contacts • Halogen-free • Addresses are mirrored for second rank
• Terminated control, command, and address bus
• Fly-by topology
Operating temperature

– Commercial (0°C ≤ TA ≤ +70°C)

– 240-pin DIMM (halogen-free)
Frequency/CAS latency

1.07ns @ CL = 13 (DDR3-1866)
1.25ns @ CL = 11 (DDR3-1600)
1.5ns @ CL = 9 (DDR3-1333)
Functional Block Diagram
Functional Block Diagram
Note: The ZQ ball on each DDR3 component is connected to an external 240Ω ±1% resistor that is tied to ground. Used for the calibration of the component’s on-die termination and output driver.
General Description
DDR3 SDRAM modules are high-speed, CMOS dynamic random access memory mod-ules that use internally configured 8-bank DDR3 SDRAM devices. DDR3 SDRAM mod-ules use DDR architecture to achieve high-speed operation. DDR3 architecture is essen-tially an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR3 SDRAM mod-ule effectively consists of a single 8n-bit-wide, one-clock-cycle data transfer at the inter-nal DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins.

DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and CK and CK# to capture commands, addresses, and control signals. Differential clocks and data strobes ensure exceptional noise immunity for these signals and provide precise crossing points to capture input signals.
Fly-By Topology
DDR3 modules use faster clock speeds than earlier DDR technologies, making signal quality more important than ever. For improved signal quality, the clock, control, com-mand, and address buses have been routed in a fly-by topology, where each clock, con-trol, command, and address pin on each DRAM is connected to a single trace and ter-minated (rather than a tree structure, where the termination is off the module near the connector). Inherent to fly-by topology, the timing skew between the clock and DQS sig-nals can be easily accounted for by using the write-leveling feature of DDR3.
Electrical Specifications
Stresses greater than those listed may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other condi-tions outside those indicated in each device's data sheet is not implied. Exposure to ab-solute maximum rating conditions for extended periods may adversely affect reliability.
Module Dimensions
240-Pin DDR3 UDIMM (R/C-B)
1.All dimensions are in millimeters (inches); MAX/MIN or typical (TYP) where noted.
2.The dimensional diagram is for reference only. Refer to the JEDEC MO document for ad-ditional design dimensions.
240-Pin DDR3 UDIMM (R/C-B1)
1.All dimensions are in millimeters (inches); MAX/MIN or typical (TYP) where noted.
2.The dimensional diagram is for reference only. Refer to the JEDEC MO document for ad-ditional design dimensions.
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